Error correction code (ECC) is widely utilized to reflect data values stored in NVM devices to avoid read errors. Parity is one of the common ECC protection schemes. For an NVM device, a set of data cells and its corresponding parity cells is called a codeword.
For NVM devices that can only be programmed uni-directionally, such as flash memories, a series of data values may be written into data cells of a codeword within a programming cycle, however, parity cell(s) of the codeword may not be programmed correspondingly without any intervening erase operations. This is because a subsequent write operation normally requires at least one state of the parity cell(s) of the codeword to be reversely programmed which cannot be achieved by unidirectionally programmed NVM devices. So, currently when data cells in a codeword are programmed for a second time, the parity cells have to be disabled to avoid errors caused by unmatched parity values.
For NVM devices that can be programmed bi-directionally, such as phase change memories (PGM), the parity cells in a codeword have to be programmed every time when a data is written into the codeword, which may cause reliability problems of the parity cells.